|
|
|
Electronic System Level DesignFPGA DesignFunctional VerificationIC DesignDigital IC Design (Place & Route)Custom DesignAnalog/Mixed-Signal VerificationQuesta ADMSQuesta ADMS RFADiTEldo ClassicEldo PremierEldo RFCalibre IC Verification & SignoffCalibre Design for ManufacturingProducts A to ZPCB Systems Design SolutionsProduct Lifecycle Management (PLM)System Modeling
|
Questa ADMSAnalog-Digital Mixed-Signal Simulator
Questa ADMS™ gives designers a comprehensive environment for verifying complex analog/mixed-signal (AMS) System-on-Chip (SoC) designs. ADMS combines four high performance simulation engines in one efficient tool: Eldo® for general purpose analog simulations, Questa® for digital simulations, ADiT™ for fast transistor-level simulations and Eldo RF for modulated steady state simulation.
High Performance and Capacity Analog and Mixed-Signal Simulation Questa ADMS extends the familiar Questa verification platform with analog and mixed-signal standard languages while maintaining a unified simulation environment. ADMS is language neutral; you can combine VHDL-AMS, Verilog-AMS, VHDL, Verilog, SystemVerilog, SPICE and SystemC anywhere and at any level in the design.
Questa ADMS includes the versatile EZwave mixed-signal waveform viewer and waveform calculation tool for display and analysis of mixed-signal results.
Integration ADMS integrates with Mentor Graphics Design Architect-IC by combining advanced model registration and selection with the DA-IC simulation cockpit and Mentor's high-speed hierarchical netlister. Design Architect IC is quick and easy to learn and integrates seamlessly with the other tools in Mentor's Custom IC Design Flow.
ADMS integrates into the Cadence Virtuoso Analog Design Environment with the same look and feel as any simulator inside the environment, but gives designers the advantage of ADMS analysis, commands and options. An enhanced symbol library providing specific Eldo devices is compatible with the Cadence library.
ADMS is complemented by ICanalyst CB to manage complex verification strategies demanded by modern mixed-signal SoCs.
ADMS is the simulation engine underlying Mentor Graphics HyperLynx Analog for functional verification of complete printed circuit boards. A single schematic supports both PCB layout and functional analysis. HyperLynx Analog combines with HyperLynx Signal Integrity to extract parasitic PCB trace models for comprehensive board-level functional analysis.
Related Products ICanalyst
EZwave
Questa® Advanced Simulator The Questa® Advanced Simulator combines high performance and capacity simulation with unified advanced debug capabilities for the most complete native support of Verilog, SystemVerilog, VHDL, SystemC, PSL and UPF . More ►
ADiT ADiT is a fast-SPICE simulation tool that delivers the ability to obtain accurate and reliable simulation results 10X – 100X faster than traditional SPICE tools.
Eldo RF Eldo RF : Transistor-level simulator for RF IC designs.
Techpubs Multimedia Foundry Partners Customer Quotes
|
|
InnoFour - Twentepoort Oost 61-02 - 7609 RG Almelo - The Netherlands
|
Analog and mixed-signal SoC designs combine analog and digital content more tightly than ever before. They increasingly depend on integrated analog blocks such as A to D and D to A converters, phase-locked loops, and adaptive filters. This increased level of integration puts tremendous pressure on designers. Traditional design tool flows force designers to develop analog and digital subsystems in isolation, delaying the integration of these components until IC layout and the testing until after fabrication. Before Questa ADMS, AMS SoC design was a slow, expensive and error-prone process.